Photonic Integrated Circuits (PICs) include interconnected semiconductor optical devices that are co-located on a single chip. Optical devices on a PIC have a variety of functionalities. For example, one optical device (e.g., a laser) may generate light, while another optical device (e.g., a detector) may absorb light. Optical devices have thermal operating conditions dependent on their function. For example, one optical device may need to dissipate heat, and another optical device may need to retain heat or dissipate less heat. Due to the close proximity of optical devices on a PIC, the thermal performance of one device may impact the performance of other devices on the PIC. For example, one device's heat retaining properties may contradict the desired heat dissipation properties of another device. PICs with buried oxide layers which serve as cladding layers to guide light in a waveguide can be susceptible to these problems because buried oxide layers generally have a low thermal conductivity (e.g., 1.5 W/m-K) and therefore can act as barriers to heat flow out of a device.
Current implementations of hybrid devices (e.g., optical devices with both silicon and a III-V semiconductor material) include such a buried oxide layer which serves as a cladding layer. One existing solution to thermal management problems is the use of polysilicon thermal shunts formed by etching out a portion of the buried oxide layer and back filling the etched region with polysilicon. However, such polysilicon shunts have limited effectiveness. Existing polysilicon shunts must be located certain lateral distances away from the center of the active region of a device due to the operational principle of the device. Light confined in the silicon waveguide of existing devices requires a cladding layer to confine the light; without the cladding layer, light will leak into the substrate below. Therefore, a buried oxide layer is located directly below the active region of existing devices, where heat dissipation is generally greatest, and the thermal shunts are located past the active region. The large thermal impedance and location of the buried oxide layer results in poor heat transfer away from the device's active region. Additionally, polysilicon has a relatively low thermal conductivity and high optical loss. Therefore, thermal shunts formed from polysilicon only marginally improve thermal performance.
Another solution aimed at improving thermal management in PICs is the use of a high thermal conductivity substrate. A device (e.g., a laser) fabricated with a high thermal conductivity substrate may have improved thermal performance, but the high thermal conductivity substrate can have a negative impact on other devices on the PIC. For example, if another device (e.g., a heater, which can heat the waveguide underneath it in order to exploit thermo-optic effects) is fabricated near a laser on the high thermal conductivity substrate, the high conductivity material can create a low impedance thermal path between the two devices. The resultant effect is unwanted thermal cross talk, and in the case of a heater, poor thermal efficiency measured as the increase in temperature per unit of power applied to the device (° C./W).
Descriptions of certain details and implementations follow, including a description of the figures, which may depict some or all of the embodiments described below, as well as discussing other potential embodiments or implementations of the inventive concepts presented herein. An overview of embodiments of the invention is provided below, followed by a more detailed description with reference to the drawings.